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? 2011 microchip technology inc. ds40146f-page 1 features security programmable 28/32-bit serial number programmable 64-bit encryption key each transmission is unique 67-bit transmission code length 32-bit hopping code 35-bit fixed code (28/32-bit serial number, 4/0-bit function code, 1-bit status, 2-bit crc) encryption keys are read protected operating 2.0-6.6v operation four button inputs - 15 functions available selectable baud rate automatic code word completion battery low signal transmitted to receiver nonvolatile synch ronization data pwm and vpwm modulation other easy to use programming interface on-chip eeprom on-chip oscillator and timing components button inputs have internal pull-down resistors current limiting on led output minimum component count enhanced features over hcs300 48-bit seed vs. 32-bit seed 2-bit crc for error detection 28/32-bit serial number select two seed transmission methods pwm and vpwm modulation wake-up signal in vpwm mode ir modulation mode typical applications the hcs361 is ideal for remote keyless entry (rke) applications. these applications include: automotive rke systems automotive alarm systems automotive immobilizers gate and garage door openers identity tokens burglar alarm systems description the hcs361 is a code hopping encoder designed for secure remote keyless en try (rke) systems. the hcs361 utilizes the k ee l oq ? code hopping technol- ogy, which incorporates high security, a small package outline and low cost, to make this device a perfect solution for unidirectional remote keyless entry sys- tems and access control systems. package types hcs361 block diagram description the hcs361 combines a 32-bit hopping code generated by a nonlinear encryption algorithm, with a 28/32-bit serial number and 7/3 status bits to create a 67-bit transmission stream. 12 3 4 8 7 6 5 s0 s1s2 s3 v dd led data v ss pdip, soic hcs361 v ss v dd oscillator reset circuit led driver controller power latching and switching button input port 32-bit shift register encoder eeprom data led s 3 s 2 s 1 s 0 hcs361 k ee l oq ? code hopping encoder downloaded from: http:///
hcs361 ds40146f-page 2 ? 2011 microchip technology inc. the crypt key, serial number and configuration data are stored in an eeprom array wh ich is not accessible via any external connection. the eeprom data is pro- grammable but read protected. the data can be veri- fied only after an automatic erase and programming operation. this protects against attempts to gain access to keys or manipulate synchronization values. the hcs361 provides an easy-to-use serial interface for programming the necessary keys, system parame- ters and configuration data. 1.0 system overview key terms the following is a list of key terms used throughout this data sheet. for additional information on k ee l oq and code hopping, refer to technical brief 3 (tb003). rke - remote keyless entry button status - indicates what button input(s) activated the transmission. encompasses the 4 button status bits s3, s2, s1 and s0 (figure 3-2). code hopping - a method by which a code, viewed externally to the system, appears to change unpredictably each time it is transmitted. code word - a block of data that is repeatedly transmitted upon button activation (figure 3-2). transmission - a data stream consisting of repeating code words (figure 9-1). crypt key - a unique and secret 64-bit number used to encrypt and decrypt data. in a symmetri- cal block cipher such as the k ee l oq algorithm, the encryption and decryption keys are equal and will therefore be referred to generally as the crypt key. encoder - a device that generates and encodes data. encryption algorithm - a recipe whereby data is scrambled using a crypt key. the data can only be interpreted by the respective decryption algorithm using the same crypt key. decoder - a device that decodes data received from an encoder. decryption algorithm - a recipe whereby data scrambled by an encryption algorithm can be unscrambled using the same crypt key. ? learn ? learning involves the receiver calculating the transmitters appropriate crypt key, decrypting the received hopping code and storing the serial number, synchronization counter value and crypt key in eeprom. the k ee l oq product family facil- itates several learning strategies to be imple- mented on the decoder. the following are examples of what can be done. - simple learning the receiver uses a fixed crypt key, common to all components of all systems by the same manufacturer, to decrypt the received code words encrypted portion. - normal learning the receiver uses information transmitted during normal operation to derive the crypt key and decrypt the received code words encrypted portion. - secure learn the transmitter is activated through a special button combination to transmit a stored 60-bit seed value used to ge nerate the transmitters crypt key. the receiver uses this seed value to derive the same crypt key and decrypt the received code words encrypted portion. manufacturers code C a unique and secret 64- bit number used to generate unique encoder crypt keys. each encoder is programmed with a crypt key that is a function of the manufacturers code. each decoder is programmed with the manufac- turer code itself. the hcs361 code hopping encoder is designed specif- ically for keyless entry systems; primarily vehicles and home garage door openers. the encoder portion of a keyless entry system is integrated into a transmitter, carried by the user and operated to gain access to a vehicle or restricted area. the hcs361 is meant to be a cost-effective yet secure solution to such systems, requiring very few external components (figure 2-1). most low-end keyless entry transmitters are given a fixed identification code that is transmitted every time a button is pushed. the number of unique identification codes in a low-end system is usually a relatively small number. these shortcomin gs provide an opportunity for a sophisticated thief to cr eate a device that grabs a transmission and retransmits it later, or a device that quickly scans all possible identification codes until the correct one is found. the hcs361, on the other hand, employs the k ee l oq code hopping technology coupled with a transmission length of 66 bits to virtually eliminate the use of code grabbing or code scanning. the high security level of the hcs361 is based on the patented k ee l oq technol- ogy. a block cipher based on a block length of 32 bits and a key length of 64 bits is used. the algorithm obscures the information in such a way that even if the transmission information (before coding) differs by only one bit from that of the pr evious transmission, the next downloaded from: http:///
? 2011 microchip technology inc. ds40146f-page 3 hcs361 coded transmission will be completely different. statis- tically, if only one bit in the 32-bit string of information changes, greater than 50 perc ent of the coded trans- mission bits will change. as indicated in the block diagram on page one, the hcs361 has a small eeprom array which must be loaded with several parameters before use; most often programmed by the manufacturer at the time of produc- tion. the most important of these are: a 28-bit serial number, typically unique for every encoder a crypt key an initial 16-bit synchronization value a 16-bit configuration value the crypt key generation typically inputs the transmitter serial number and 64-bit manufacturers code into the key generation algorithm (figure 1-1). the manufac- turers code is chosen by th e system manufacturer and must be carefully controlled as it is a pivotal part of the overall system security. figure 1-1: creation and storage of crypt key during production the 16-bit synchronization c ounter is the basis behind the transmitted code word changing for each transmis- sion; it increments each time a button is pressed. due to the code hopping algorithms complexity, each incre- ment of the synchronization value results in greater than 50% of the bits changing in the transmitted code word. figure 1-2 shows how the key values in eeprom are used in the encoder. once the encoder detects a button press, it reads the button inputs and updates the syn- chronization counter. the synchronization counter and crypt key are input to the encryption algorithm and the output is 32 bits of encrypt ed information. this data will change with every button press, its value appearing externally to randomly hop around, hence it is referred to as the hopping portion of the code word. the 32-bit hopping code is combined with the button information and serial number to form the code word transmitted to the receiver. the code word format is explained in greater detail in section 4.2. a receiver may use any type of controller as a decoder, but it is typically a microcontroller with compatible firm- ware that allows the decoder to operate in conjunction with an hcs361 based transmitter. section 7.0 provides detail on integr ating the hcs361 into a sys- tem. a transmitter must first be learned by the receiver before its use is allow ed in the system. learning includes calculating the transmitters appropriate crypt key, decrypting the received hopping code and storing the serial number, synchronization counter value and crypt key in eeprom. in normal operation, each received message of valid format is evaluated. the serial number is used to deter- mine if it is from a learned transmitter. if from a learned transmitter, the message is decrypted and the synchro- nization counter is verified. finally, the button status is checked to see what operation is requested. figure 1-3 shows the relationship between some of the values stored by the receiver and the values received from the transmitter. transmitter manufacturers serial number code crypt key key generation algorithm serial number crypt key sync counter . . . hcs361 production programmer eeprom array downloaded from: http:///
hcs361 ds40146f-page 4 ? 2011 microchip technology inc. figure 1-2: building the transmitted code word (encoder) figure 1-3: basic operation of receiver (decoder) note: circled numbers indicate the order of execution. button press information eeprom array 32 bits encrypted data serial number transmitted information crypt key sync counter serial number k ee l oq ? encryption algorithm button press information eeprom array manufacturer code 32 bits of encrypted data serial number received information decrypted synchronization counter check for match sync counter serial number k ee l oq ? decryptionalgorithm 1 3 4 check for match 2 perform function indicated by button press 5 crypt key downloaded from: http:///
? 2011 microchip technology inc. ds40146f-page 5 hcs361 2.0 device operation as shown in the typical application circuits (figure 2-1), the hcs361 is a simple device to use. it requires only the addition of buttons and rf circuitry for use as the transmitter in your security application. a description of each pin is described in table 2-1. figure 2-1: typical circuits table 2-1: pin descriptions the hcs361 will wake-up upon detecting a button press and delay approximately 10 ms for button debounce (figure 2-2). the synchronization counter, discrimination value and button information will be encrypted to form the hopping code. the hopping code portion will change every tr ansmission, even if the same button is pushed again. a code word that has been transmitted will not repeat for more than 64k transmissions. this provides more than 18 years of use before a code is repeated; based on 10 operations per day. overflow information sent from the encoder can be used to extend the number of unique transmissions to more than 192k. if in the transmit process it is detected that a new but- ton(s) has been pressed, a reset will immediately occur and the current code word will not be completed. please note that buttons removed will not have any effect on the code word unless no buttons remain pressed; in which case the code word will be completed and the power-down will occur. figure 2-2: encoder operation name pin number description s0 1 switch input 0 s1 2 switch input 1 s2 3 switch input 2 / clock pin when in programming mode s3 4 switch input 3 v ss 5 ground reference data 6 data output pin /data i/o pin for programming mode led 7 cathode connection for led v dd 8 positive supply voltage v dd b0 tx out s0 s1s2 s3 led v dd data v ss two button remote control b1 v dd tx out s0 s1s2 s3 led v dd data v ss five button remote control (note 1 ) b4 b3 b2 b1 b0 note: up to 15 functions can be implemented by pressing more than one button simultaneously or by using a suitable diode array. power-up reset and debounce delay (10 ms) sample inputs update sync info encrypt with load transmit register buttons added ? all buttons released ? (a button has been pressed) transmit stop no yes no yes crypt key complete code word transmission downloaded from: http:///
hcs361 ds40146f-page 6 ? 2011 microchip technology inc. 3.0 eeprom memory organization the hcs361 contains 192 bits (12 x 16-bit words) of eeprom memory (table 3-1). this eeprom array is used to store the encryption key information, synchronization value, etc. further descriptions of the memory array is given in the following sections. table 3-1: eeprom memory map 3.1 key_0 - key_3 (64-bit crypt key) the 64-bit crypt key is used to create the encrypted message transmitted to the re ceiver. this key is calcu- lated and programmed during production using a key generation algorithm. the key generation algorithm may be different from the k ee l oq algorithm. inputs to the key generation algorithm are typically the transmit- ters serial number and the 64-bit manufacturers code. while the key generation algorithm supplied from microchip is the typical method used, a user may elect to create their own method of key generation. this may be done providing that the de coder is programmed with the same means of creating the key for decryption purposes. 3.2 sync_a, sync_b (synchronization counter) this is the 16-bit synchronization value that is used to create the hopping code for transmission. this value is incremented after every transmission. separate syn- chronization counters can be used to stay synchro- nized with different receivers. 3.3 seed_0, seed_1, and seed_2 (seed word) the three word (48 bits) seed code will be transmitted when seed transmission is sele cted. this allows the sys- tem designer to implement the secure learn feature or use this fixed code word as part of a different key genera- tion/tracking process or purely as a fixed code transmis- sion. 3.4 ser_0, ser_1 (encoder serial number) ser_0 and ser_1 are the lower and upper words of the device serial number, respectively. there are 32 bits allocated for the serial number and a selectable configuration bit determines whether 32 or 28 bits will be transmitted. the serial number is meant to be unique for every transmitter. word address mnemonic description 0 key_0 64-bit crypt key (word 0) lsbs 1 key_1 64-bit crypt key (word 1) 2 key_2 64-bit crypt key (word 2) 3 key_3 64-bit crypt key (word 3) msbs 4 sync_a 16-bit synch counter 5 sync_b/ seed_2 16-bit synch counter b or seed value (word 2) 6 reserved set to 0000h 7 seed_0 seed value (word 0) lsbs 8 seed_1 seed value (word 1) msbs 9 ser_0 device serial number (word 0) lsbs 10 ser_1 device serial number (word 1) msbs 11 config configuration word note: since seed2 and sync_b share the same memory location, secure learn and independent mode transmission (including ir mode) are mutually exclusive. downloaded from: http:///
? 2011 microchip technology inc. ds40146f-page 7 hcs361 3.5 config (configuration word) the configuration word is a 16-bit word stored in eeprom array that is used by the device to store information used during the encryption process, as well as the status of option configurations. further explanations of each of the bits are described in the following sections. table 3-1: configuration word 3.5.1 mod: modulation format mod selects between vpwm modulation and pwm modulation format. if mod = 1, vpwm modulation is selected as well as the following: 1. enables the txwak bit to select the wake-up transmission. 2. extends the guard time. if mod = 0, pwm modulation is selected. 3.5.2 bsel: baud rate select bsel selects the baud rate. if bsel = 1, the baud rate is nominally 1667 bits per second and with bsel = 0, 833 bits per second. 3.5.3 txwak: bit format select or wake-up in pwm mode, this bit selects the bit format. if txwak = 0, the pwm pul se duty cycle is 1/3-2/3. if txwak = 1, the pwm pul se duty cycle is 1/6-2/6. in vpwm mode, this bit enables the wake-up signal. if txwak = 0, transmissi ons start normally with the preamble portion of the code word. if txwak = 1, transmissions start with a wake-up sequence followed by a dead time (see figure 4-2). the following tables summarize the combined effect of txwak, bsel and mod option bits. table 3-1: pwm options table 3-2: vpwm options 3.5.4 spm: sync pulse modulation select modulation mode of sync pulse. if spm = 1, the sync pulse is modulated (figure 4-1 and figure 4-2). 3.5.5 ovr: overflow the overflow bit is used to extend the number of possi- ble synchronization values. the synchronization coun- ter is 16 bits in length, yielding 65,536 values before the cycle repeats. under typical use of 10 operations a day, this will provide nearly 18 years of use before a repeated value will be used. should the system designer conclude that is not adequate, then the over- flow bit can be utilized to extend the number of unique values. this can be done by programming ovr to 1 at the time of production. the encoder will automatically clear ovr the first time that the transmitted synchroni- zation value wraps from 0xffff to 0x0000. once cleared, ovr cannot be set again, thereby creating a permanent record of the c ounter overflow. this pre- vents fast cycling of 64k counter. if the decoder system is programmed to track the overflow bits, then the effec- tive number of unique synchronization values can be extended to 128k. if programmed to zero, the system will be compatible with old encoder devices. bit number symbol bit description 0b a c w blank alternate code word 1 bsel baud rate selection 2 txwak pwm mode: 1/6, 2/6 or 1/3, 2/3 select vpwm mode: wake-up enable 3 spm sync pulse modulation 4 seed seed transmission enable 5d e l m delay mode enable 6t i m o time-out enable 7i n d independent mode enable 8 usra0 user bit 9 usra1 user bit 10 usrb0 user bit 11 usrb1 user bit 12 xser extended serial number enable 13 tmpsd temporary seed transmission enable 14 mod modulation format select 15 ovr overflow bit note: the wake-up sequence is transmitted before the first code word of each trans- mission only. mod txwak bsel t e duty cycle 0 0 0 400us 1/3-2/3 0 0 1 200us 1/3-2/3 0 1 0 200us 1/6-2/6 0 1 1 100us 1/6-2/6 mod txwak bsel t e wake-up 1 0 0 400us no 1 0 1 200us no 1 1 0 400us yes 1 1 1 200us yes downloaded from: http:///
hcs361 ds40146f-page 8 ? 2011 microchip technology inc. 3.5.6 bacw: blank alternate code word bacw = 1 selects the encoder to transmit every sec- ond code word. this can be used to reduce the aver- age power transmitted over a 100 ms window and thereby transmit a higher peak power (see section 5.2). 3.5.7 xser: extended serial number if xser = 0, the four most significant bits of the serial number are substituted by s[3:0] and the code word format is compatible with the hcs200/300/301. if xser = 1, the full 32- bit serial number [ser_1, ser_0] is transmitted. 3.5.8 discrimination value while in other k ee l oq encoders its value is user selectable, the hcs361 uses directly the 8 least sig- nificant bits of the serial number as part of the infor- mation that form the encrypted portion of the transmission (figure 3-2). the discrimination value aids the post-decryption check on the decoder end. after the receiver has decrypted a transmission, the discrimination bits are checked against the encoder serial number to verify that the decryption process was valid. 3.5.9 usra,b: user bits user bits form part of the discrimination value. the user bits together with the ind bit can be used to identify the counter that is us ed in independent mode. figure 3-2: code word organization note: since the button status s[3:0] is used to detect a seed transmission, extended serial number and secure learn are mutually exclusive. discrimination bits (12 bits) iouuss...s nv s s e e ...e dr r rrr ...r 1076...0 fixed code portion of transmission encrypted portion of transmission 67 bits of data transmitted msb lsb crc (2-bit) v low (1-bit) button status (4 bits) 28-bit serial number button status (4 bits) discrimination bits (12 bits) 16-bit sync value button status (4 bits) ss s s 21 0 3 fixed code portion of transmission encrypted portion of transmission msb lsb crc (2-bit) v low (1-bit) 32-bit extended serial number button status (4 bits) discrimination bits (12 bits) 16-bit sync value xser=1 xser=0 downloaded from: http:///
? 2011 microchip technology inc. ds40146f-page 9 hcs361 3.5.10 seed: enable seed transmission if seed = 0, seed transmi ssion is disabled. the inde- pendent counter mode can only be used with seed transmission disabled since seed_2 is shared with the second synchronization counter. with seed = 1, seed transmission is enabled. the appropriate button code(s) must be activated to trans- mit the seed information. in this mode, the seed infor- mation (seed_0, seed_1 , and seed_2) and the upper 12 or 16 bits of the serial number (ser_1)are transmitted instead of the hop code. seed transmission is available for function codes (table 3-2) s[3:0] = 1001 and s[3:0] = 0011 (delayed). this takes place regardless of the setting of the ind bit. the two seed transmissions are shown in figure 3-3. figure 3-3: seed transmission 3.5.11 tmpsd: temporary seed transmission the temporary seed transmission can be used to dis- able learning after the transmitter has been used for a programmable number of op erations. this feature can be used to implement very secure systems. after learn- ing is disabled, the seed information cannot be accessed even if physical a ccess to the transmitter is possible. if tmpsd = 1 the seed transmission will be disabled after a number of code hopping transmis- sions. the number of transmissions before seed trans- mission is disabled, can be programmed by setting the synchronization counter (sync_a or sync_b) to a value as shown in table 3-4. table 3-4: synchronous counter initialization values all examples shown with xser = 1, seed = 1 when s[3:0] = 1001, delay is not applicable. crc+v low ser_1 seed_2 seed_1 seed_0 data transmission direction for s[3:0] = 0x3 before delay: 16-bit data word 16-bit counter encrypt crc+v low ser_1 ser_0 encrypted data for s[3:0] = 0011 after delay (note 1, note 2): crc+v low ser_1 seed_2 seed_1 seed_0 data transmission direction data transmission direction note 1: for seed transmission, seed_2 is transmitted instead of ser_0. 2: for seed transmission, the setting of delm has no effect. synchronous counter values number of transmissions 0000h 128 0060h 64 0050h 32 0048h 16 downloaded from: http:///
hcs361 ds40146f-page 10 ? 2011 microchip technology inc. 3.5.12 delm: delay mode if delm = 1, delay transmission is enabled. a delayed transmission is indicated by inverting the lower nibble of the discrimination value. the delay mode is primarily for compatibility with previous k ee l oq devices. if delm = 0, delay transmission is disabled (table 3- 1). table 3-1: typical delay times 3.5.13 timo: time-out or auto-shutoff if timo = 1, the time-out is enabled. time-out can be used to terminate accidental continuous transmissions. when time-out occurs, the pwm output is set low and the led is turned off. current consumption will be higher than in standby mode since current will flow through the activated input resistors. this state can be exited only after all inputs are taken low. timo = 0, will enable continuous transmission (table 3-5). table 3-5: typical time-out times txwak bsel number of code words before delay mode time before delay mode (mod = 0) 00 2 8 2.8s 01 5 6 2.9s 10 2 8 2.6s 11 5 6 2.8s txwak bsel maximum number of code words transmitted time before time-out (mod = 0) 0 0 256 25.6s 0 1 512 27.2s 1 0 256 23.8s 1 1 512 25.4s downloaded from: http:///
? 2011 microchip technology inc. ds40146f-page 11 hcs361 3.5.14 ind: i ndependent mode the independent mode can be used where one encoder is used to control two receivers. two counters (sync_a and sync_b) are used in independent mode. as indicated in table 3-2, function codes 1 to 7 use sync_a and 8 to 15 sync_b. 3.5.15 infrared mode the independent mode also selects ir mode. in ir mode function codes 12 to 15 will use counter b. the pwm output signal is modulated with a 40 khz carrier (see table 3-1). it must be pointed out that the 40 khz is derived from the internal clock and will therefore vary with the same percentage as the baud rate. if ind = 0, sync_a is used for all function codes. if ind = 1, inde- pendent mode is enabled and counters for functions are used according to table 3-2. table 3-1: ir modulation table 3-2: function codes note 1: ir mode t e basic pulse 400us 200us 100us (400 s) (16x) (200 s) (8x) period = 25 s (100 s) (4x) s3 s2 s1 s0 ind = 0 ind = 1 comments counter 10001 a a 20010 a a 30011 a a if seed = 1, transmit seed after delay. (1) 40100 a a 50101 a a 60110 a a 70111 a a 81000 a b 91001 a b if seed = 1, transmit seed immediately. (1) 1 01010 a b 1 11011 a b 1 21100 a b (1) 1 31101 a b (1) 1 41110 a b (1) 1 51111 a b (1) downloaded from: http:///
hcs361 ds40146f-page 12 ? 2011 microchip technology inc. 4.0 transmitted word 4.1 transmission format (pwm) the hcs361 transmission is made up of several parts (figure 4-1 and figure 4-2). each transmission is begun with a preamble and a header, followed by the encrypted and then the fix ed data. the actual data is 67 bits which consists of 32 bits of encrypted data and 35 bits of fixed data. each transmission is followed by a guard period before another transmission can begin. refer to table 9-6 and table 9-6 for transmission tim- ing specifications. the encrypted portion provides up to four billion changing code combinations and includes the function bits (based on which buttons were acti- vated) along with the synchronization counter value and discrimination value. the non-encrypted portion is comprised of the crc bits, v low bits, the function bits and the 28/32-bit serial number. the encrypted and non-encrypted sections combined increase the number of combinations to 1.47 x 10 20 . 4.2 code word organization the hcs361 transmits a 67-bit code word when a but- ton is pressed. the 67-bit word is constructed from a fixed code portion and an encrypted code portion (figure 3-2). the encrypted data is generated from 4 function bits, 2 user bits, overflow bit, independent mode bit, and 8 serial number bits, and the 16-bit synchronization value (figure 9-4). the non-encrypted code data is made up of v low bit, 2 crc bits, 4 function bits, and the 28-bit serial number. if the extended serial number (32 bits) is selected, the 4 function code bits will not be transmit- ted. figure 4-1: pwm transmis sion format (mod = 0) t bp =6 x t e duty cycle: 1/6-2/6 code word: transmission sequence: preamble header encrypt fixed guard 1st code word preamble header encrypt (txwak=1) t bp logic 0 logic 1 duty cycle: 1/3-2/3 (txwak=0) t bp =3 x t e logic 0 t bp logic 1 t e t e code word guard time spm=1 spm=0 18xt e preamble 10xt e header encrypted portion fixed code portion t bp 1 6 10 10xt e sync txwak=0 txwak=1 33% duty cycle pulse downloaded from: http:///
? 2011 microchip technology inc. ds40146f-page 13 hcs361 figure 4-2: vpwm transmissi on format (mod = 1) vpwm bit encoding: vpwm transmission sequence: wake-up (txwak=1) preamble header encrypt fixed guard dead time 1st code word preamble header encrypt t bp code word guard time spm=1 spm=0 18xt e preamble 10xt e header encrypted portion fixed code portion t bp 1 6 10 logic 0 logic 1 on transition low to high t bp logic 0 t bp logic 1 t e 33% duty cycle wake-up sequence 250xt e on transition high to low 2 x t e wake-up: t e t bp t e code word: t bp 1 84 t bp t e dead time 258xt e 2 x t e 10xt e sync pulse downloaded from: http:///
hcs361 ds40146f-page 14 ? 2011 microchip technology inc. 5.0 special features 5.1 code word completion code word completion is an automatic feature that ensures that the entire code word is transmitted, even if the button is released before the transmission is com- plete and that a minimum of two words are completed. the hcs361 encoder powers itself up when a button is pushed and powers itself down after the current trans- mission is finished, if the us er has already released the button. if the button is held down beyond the time for two transmissions, then multiple transmissions will result. the hcs361 transmits at least two transmis- sions before powering down. if another button is acti- vated during a transmission, the active transmission will be aborted and the new code will be generated using the new button information. 5.2 blank alternate code word federal communications co mmission (fcc) part 15 rules specify the limits on fundamental power and harmonics that can be transmitted. power is calculated on the worst case average power transmitted in a 100 ms window. it is therefore advantageous to minimize the duty cycle of the transmitted word. this can be achieved by minimizing the duty cycle of the individual bits and by blanking out consecutive words. blank alternate code word (bacw) is used for reducing the average power of a transmission (figure 5-1). this is a selectable feature. using the bacw allows the user to transmit a higher amplitude transmission if the transmission length is shorter. the fcc puts constraints on the average power that can be transmitted by a device, and bacw effectively prevents continuous transmission by only allowing the transmission of every second word. this reduces the average power transmitted and hence, assists in fcc approval of a transmitter device. 5.3 crc (cycle redundancy check) bits the crc bits are calculated on the 65 previously trans- mitted bits. the crc bits can be used by the receiver to check the data integrity before processing starts. the crc can detect all single bit and 66% of double bit errors. the crc is computed as follows: equation 5-1: crc calculation and with and di n the nth transmission bit 0 e n e 64 figure 5-1: blank alternate code word (bacw) note: the crc may be wrong when the battery voltage is around either of the v low trip points. this may happen because v low is sampled twice each transmission, once for the crc calculation (pwm is low) and once when v low is transmitted (pwm is high). v dd tends to move slightly during a transmis- sion which could lead to a different value for v low being used for the crc calculation and the transmission . work around: if the crc calculation is incor- rect, recalculate for the opposite value of v low . crc 1 [] n 1 + crc 0 [] n di n = crc 0 [] n 1 + crc 0 [] n di n () crc 1 [] n = crc 10 , [] 0 0 = code word brs = 0 brs = 1 a 2a time code word code word code word amplitude downloaded from: http:///
? 2011 microchip technology inc. ds40146f-page 15 hcs361 5.4 auto-shutoff the auto-shutoff function automatically stops the device from transmitting if a button inadvertently gets pressed for a long period of time. this will prevent the device from draining the battery if a button gets pressed while the transmitte r is in a pocket or purse. this function can be enabled or disabled and is selected by setting or clearing the time-out bit (section 3.5.13). setting this bit will enable the function (turn auto-shutoff function on) and clearing the bit will disable the function. time-o ut period is approximately 25 seconds. 5.5 v low : voltage low indicator the v low bit is transmitted with every transmission (figure 3-2) and will be transmitted as a one if the operating voltage has dropped below the low voltage trip point, typically 3.8v at 25c. this v low signal is transmitted so the receiver ca n give an indication to the user that the transmitter battery is low. 5.6 led output operation during normal transmission the led output is low while the data is being transmitted and high during the guard time. two voltage indications are combined into one bit: v low . table 5-1 indicates the operation value of v low while data is being transmitted. figure 5-2: v low trip point vs. temperature if the supply voltage drops below the low voltage trip point, the led output will be toggled at approximately 1hz during the transmission. table 5-1: v low and led vs. v dd *see also flash operating modes. approximate supply voltage vlow bit led operation* max 3.8v 0 normal 3.8v 2.2v 1 flashing 2.2v min 0 normal 3.5 2v -40 25 85 v low =0 nominal trip point 3.8v v low =1 v low =0 nominal trip point 4.5 4 3.5 3 2.5 2 1.5 downloaded from: http:///
hcs361 ds40146f-page 16 ? 2011 microchip technology inc. 6.0 programmin g the hcs361 when using the hcs361 in a system, the user will have to program some parameters into the device including the serial number and the secret key before it can be used. the programming cycle allows the user to input all 192 bits in a serial data stream, which are then stored internally in eeprom. programming will be initiated by forcing the pwm line high, after the s3 line has been held high for the appropriate length of time. s0 should be held low during the entire program cycle. the s1 line on the hcs361 part needs to be set or cleared depending on the ls bit of the memory map (key 0) before the key is clocked in to the hcs361. s1 must remain at this level for the duration of the pro- gramming cycle. the device can then be programmed by clocking in 16 bits at a time, followed by the words complement using s3 or s2 as the clock line and pwm as the data in line. after each 16-bit word is loaded, a programming delay is required for the internal program cycle to complete. an acknowledge bit can be read back after the programming delay (t wc ). after the first word and its complement have been downloaded, an automatic bulk write is performed. this delay can take up to twc. at the end of the programming cycle, the device can be verified (figure 6-1) by reading back the eeprom. reading is done by clocking the s3 line and reading the data bits on pwm. for security reasons, it is not possible to execute a verify function without first programming the eeprom. a verify operation can only be done once, immediately following the pro- gram cycle . figure 6-1: programming waveforms figure 6-2: verify waveforms the v dd pin must be taken to ground after a program/verify cycle. data enter program mode (data) (clock) bit 1 bit 2 bit 3 bit 14 bit 15 bit 16 bit 17 t 1 t 2 repeat for each word t clkh t clkl t wc t ds s2/s3 data for word 0 (key_0) data for word 1 t dh bit 0 bit 1 bit 2 bit 3 bit 14 bit 15 s1 bit 0 bit 0 of word0 note 1: unused button inputs to be held to gr ound during the entire programming sequence. 2: the v dd pin must be taken to groun d after a program/verify cycle. acknowledge pulse data (clock) (data) note: a verify sequence is performed only once immediately after the program cycle. end of programming cycle beginning of verify cycle bit 1 bit 2 bit 3 bit 15 bit 14 bit 16 bit 17 bit190 bit191 t wc data from word0 t dv s2/s3 bit 0 bit191 bit190 s1 ack downloaded from: http:///
? 2011 microchip technology inc. ds40146f-page 17 hcs361 table 6-3: programming/verify timing requirements note 1: typical values - not tested in production. v dd = 5.0v 10% 25 c 5 c parameter symbol min. max. units program mode setup time t 2 04 . 0m s hold time 1 t 1 9.0 ? ms program cycle time t wc 50 ? ms clock low time t clkl 50 ? s clock high time t clkh 50 ? s data setup time t ds 0? s (1) data hold time t dh 30 ? s (1) data out valid time t dv ?3 0 s (1) downloaded from: http:///
hcs361 ds40146f-page 18 ? 2011 microchip technology inc. 7.0 integrating the hcs361 into a system use of the hcs361 in a syst em requires a compatible decoder. this decoder is typi cally a microcontroller with compatible firmware. microchip will provide (via a license agreement) firmware routines that accept transmissions from the hcs361 and decrypt the hopping code portion of the data stream. these routines provide system designers the means to develop their own decoding system. 7.1 learning a transmitter to a receiver a transmitter must first be 'learned' by a decoder before its use is allowed in the system. several learning strat- egies are possible, figure 7-1 details a typical learn sequence. core to each, the decoder must minimally store each learned transmitter's serial number and cur- rent synchronization counter value in eeprom. addi- tionally, the decoder typically stores each transmitter's unique crypt key. the maximum number of learned transmitters will therefore be relative to the available eeprom. a transmitter's serial number is transmitted in the clear but the synchronization counter only exists in the code word's encrypted portion. the decoder obtains the counter value by decrypting using the same key used to encrypt the information. the k ee l oq algorithm is a symmetrical block cipher so the encryption and decryp- tion keys are identical and referred to generally as the crypt key. the encoder receives its crypt key during manufacturing. the decoder is programmed with the ability to generate a crypt key as well as all but one required input to the key ge neration routine; typically the transmitter's serial number. figure 7-1 summarizes a typi cal learn sequence. the decoder receives and authenticates a first transmis- sion; first button press. authentication involves gener- ating the appropriate crypt key, decrypting, validating the correct key usage via the discrimination bits and buffering the counter value. a second transmission is received and authenticated. a final check verifies the counter values were seque ntial; consecutive button presses. if the learn sequence is successfully com- plete, the decoder stores the learned transmitter's serial number, current synch ronization counter value and appropriate crypt key. from now on the crypt key will be retrieved from eeprom during normal opera- tion instead of recalculating it for each transmission received. certain learning strategies have been patented and care must be take n not to infringe. figure 7-1: typical learn sequence enter learn mode wait for reception of a valid code generate key from serial number use generated key to decrypt compare discrimination value with fixed value equal wait for reception of second valid code compare discrimination value with fixed value use generated key to decrypt equal counters encryption key serial number synchronization counter sequential ? ? ? exit learn successful store: learn unsuccessful no no no yes yes yes downloaded from: http:///
? 2011 microchip technology inc. ds40146f-page 19 hcs361 7.2 decoder operation figure 7-2 summarizes normal decoder operation. the decoder waits until a transmission is received. the received serial number is compared to the eeprom table of learned transmitters to first determine if this transmitter's use is allowed in the system. if from a learned transmitter, the transmission is decrypted using the stored crypt key and authenticated via the discrimination bits for appropriate crypt key usage. if the decryption was valid the synchronization value is evaluated. figure 7-2: typical decoder operation 7.3 synchronization with decoder (evaluating the counter) the k ee l oq technology patent scope includes a sophisticated synchronization technique that does not require the calculation and st orage of future codes. the technique securely blocks invalid transmissions while providing transparent resynchronization to transmitters inadvertently activated aw ay from the receiver. figure 7-3 shows a 3-partition, rotating synchronization window. the size of each window is optional but the technique is fundamental. each time a transmission is authenticated, the intended function is executed and the transmission's synchroni zation counter value is stored in eeprom. from t he currently stored counter value there is an initial "single operation" forward win- dow of 16 codes. if the difference between a received synchronization counter and the last stored counter is within 16, the intended function will be executed on the single button press and the new synchronization coun- ter will be stored. storing the new synchronization counter value effectively rotates the entire synchroniza- tion window. a "double operation" (resynchronization) window fur- ther exists from the sing le operation window up to 32k codes forward of the currently stored counter value. it is referred to as "double operation" because a trans- mission with synchronization c ounter value in this win- dow will require an additional, sequential counter transmission prior to executing the intended function. upon receiving the sequential transmission the decoder executes the intend ed function and stores the synchronization counter valu e. this resynchronization occurs transparently to the user as it is human nature to press the button a second ti me if the first was unsuc- cessful. the third window is a "blocked window" ranging from the double operation window to the currently stored synchronization counter value. any transmission with synchronization counter value within this window will be ignored. this window excludes previously used, perhaps code-grabbed transmissions from accessing the system. ? transmission received does serial number match ? decrypt transmission is decryption valid ? is counter within 16 ? is counter within 32k ? update counter execute command save counter in temp location start no no no no yes yes yes yes yes no and no note: the synchronization method described in this section is only a typical implementation and because it is usually implemented in firmware, it can be altered to fit the needs of a particular system. downloaded from: http:///
hcs361 ds40146f-page 20 ? 2011 microchip technology inc. figure 7-3: synchronization window blocked entire window rotates to eliminate use of previously used codes single operation window window (32k codes) (16 codes) double operation (resynchronization) window (32k codes) stored synchronization counter value downloaded from: http:///
? 2011 microchip technology inc. ds40146f-page 21 hcs361 8.0 development support the pic ? microcontrollers and dspic ? digital signal controllers are supported with a full range of software and hardware development tools: integrated development environment - mplab ? ide software compilers/assemblers/linkers - mplab c compiler for various device families - hi-tech c for various device families - mpasm tm assembler -mplink tm object linker/ mplib tm object librarian - mplab assembler/link er/librarian for various device families simulators - mplab sim software simulator emulators - mplab real ice? in-circuit emulator in-circuit debuggers - mplab icd 3 - pickit? 3 debug express device programmers - pickit? 2 programmer - mplab pm3 device programmer low-cost demonstratio n/development boards, evaluation kits, and starter kits 8.1 mplab integrated development environment software the mplab ide software brings an ease of software development previously unseen in the 8/16/32-bit microcontroller market. the mplab ide is a windows ? operating system-based app lication that contains: a single graphical interface to all debugging tools - simulator - programmer (sold separately) - in-circuit emulator (sold separately) - in-circuit debugger (sold separately) a full-featured editor with color-coded context a multiple project manager customizable data windows with direct edit of contents high-level source code debugging mouse over variable inspection drag and drop variables from source to watch windows extensive on-line help integration of select thir d party tools, such as iar c compilers the mplab ide allows you to: edit your source files (either c or assembly) one-touch compile or assemble, and download to emulator and simulator tools (automatically updates all project information) debug using: - source files (c or assembly) - mixed c and assembly - machine code mplab ide supports multiple debugging tools in a single development paradigm, from the cost-effective simulators, through low-cost in-circuit debuggers, to full-featured emulators. this eliminates the learning curve when upgrading to tools with increased flexibility and power. downloaded from: http:///
hcs361 ds40146f-page 22 ? 2011 microchip technology inc. 8.2 mplab c compilers for various device families the mplab c compiler code development systems are complete ansi c compilers for microchips pic18, pic24 and pic32 families of microcontrollers and the dspic30 and dspic33 families of digital signal control- lers. these compilers provide powerful integration capabilities, superior code optimization and ease of use. for easy source level debugging, the compilers provide symbol information that is optimized to the mplab ide debugger. 8.3 hi-tech c for various device families the hi-tech c compiler code development systems are complete ansi c comp ilers for microchips pic family of microcontrollers and the dspic family of digital signal controllers. these compilers provide powerful integration capabilities, omniscient code generation and ease of use. for easy source level debugging, the compilers provide symbol information that is optimized to the mplab ide debugger. the compilers include a macro assembler, linker, pre- processor, and one-step driver, and can run on multiple platforms. 8.4 mpasm assembler the mpasm assembler is a full-featured, universal macro assembler for pic10/12/16/18 mcus. the mpasm assembler generates relocatable object files for the mplink object linker, intel ? standard hex files, map files to detail memory usage and symbol reference, absolute lst files that contain source lines and generated machine code and coff files for debugging. the mpasm assembler features include: integration into mplab ide projects user-defined macros to streamline assembly code conditional assembly for multi-purpose source files directives that allow complete control over the assembly process 8.5 mplink object linker/ mplib object librarian the mplink object linker combines relocatable objects created by the mpasm assembler and the mplab c18 c compiler. it can link relocatable objects from precompiled libraries, using directives from a linker script. the mplib object librarian manages the creation and modification of library files of precompiled code. when a routine from a library is called from a source file, only the modules that contain that routine will be linked in with the application. this allows large libraries to be used efficiently in many different applications. the object linker/libra ry features include: efficient linking of single libraries instead of many smaller files enhanced code maintainability by grouping related modules together flexible creation of libraries with easy module listing, replacement, deletion and extraction 8.6 mplab assembler, linker and librarian for various device families mplab assembler produces relocatable machine code from symbolic assembly language for pic24, pic32 and dspic devices. mplab c compiler uses the assembler to produce its object file. the assembler generates relocatable objec t files that can then be archived or linked with other relocatable object files and archives to create an execut able file. notable features of the assembler include: support for the entire device instruction set support for fixed-point and floating-point data command line interface rich directive set flexible macro language mplab ide compatibility downloaded from: http:///
? 2011 microchip technology inc. ds40146f-page 23 hcs361 8.7 mplab sim software simulator the mplab sim software simulator allows code development in a pc-hosted environment by simulat- ing the pic ? mcus and dspic ? dscs on an instruction level. on any given instruction, the data areas can be examined or modified and stimuli can be applied from a comprehensive stimulus c ontroller. registers can be logged to files for further run-time analysis. the trace buffer and logic analyzer display extend the power of the simulator to record and track program execution, actions on i/o, most peripherals and internal registers. the mplab sim software simulator fully supports symbolic debugging using the mplab c compilers, and the mpasm and mplab assemblers. the soft- ware simulator offers the flexibility to develop and debug code outside of the hardware laboratory envi- ronment, making it an excellent, economical software development tool. 8.8 mplab real ice in-circuit emulator system mplab real ice in-circuit emulator system is microchips next generation high-speed emulator for microchip flash dsc and mcu devices. it debugs and programs pic ? flash mcus and dspic ? flash dscs with the easy-to-use, powerful graphical user interface of the mplab integrated devel opment environment (ide), included with each kit. the emulator is connected to the design engineers pc using a high-speed usb 2.0 interface and is connected to the target with either a connector compatible with in- circuit debugger systems (rj11) or with the new high- speed, noise tolerant, low-voltage differential signal (lvds) interconnection (cat5). the emulator is field upgradable through future firmware downloads in mplab ide. in upcoming releases of mplab ide, new devices will be supported, and new features will be added. mplab real ice offers significant advantages over competitive emulators including low-cost, full-speed emulation, run-time variable watches, trace analysis, complex breakpoints, a ruggedized probe interface and long (up to three meters) interconnection cables. 8.9 mplab icd 3 in-circuit debugger system mplab icd 3 in-circuit debugger system is micro- chip's most cost effective high-speed hardware debugger/programmer for microchip flash digital sig- nal controller (dsc) and microcontroller (mcu) devices. it debugs and programs pic ? flash microcon- trollers and dspic ? dscs with the powerful, yet easy- to-use graphical user interface of mplab integrated development environment (ide). the mplab icd 3 in-circuit debugger probe is con- nected to the design engineer's pc using a high-speed usb 2.0 interface and is connected to the target with a connector compatible with the mplab icd 2 or mplab real ice systems (rj-11). mplab icd 3 supports all mplab icd 2 headers. 8.10 pickit 3 in-circuit debugger/ programmer and pickit 3 debug express the mplab pickit 3 allows debugging and program- ming of pic ? and dspic ? flash microcontrollers at a most affordable price point using the powerful graphical user interface of the mp lab integrated development environment (ide). the mplab pickit 3 is connected to the design engineer's pc using a full speed usb interface and can be connec ted to the target via an microchip debug (rj-11) connector (compatible with mplab icd 3 and mplab real ice). the connector uses two device i/o pins and the reset line to imple- ment in-circuit debugging and in-circuit serial pro- gramming?. the pickit 3 debug express include the pickit 3, demo board and microcontroller, hookup cables and cdrom with users guide, lessons, tutorial, compiler and mplab ide software. downloaded from: http:///
hcs361 ds40146f-page 24 ? 2011 microchip technology inc. 8.11 pickit 2 development programmer/debugger and pickit 2 debug express the pickit? 2 development programmer/debugger is a low-cost development tool with an easy to use inter- face for programming and debugging microchips flash families of microcontrollers. the full featured windows ? programming interface supports baseline (pic10f, pic12f5xx, pic16f5xx), midrange (pic12f6xx, pic16f), pic18f, pic24, dspic30, dspic33, and pic32 families of 8-bit, 16-bit, and 32-bit microcontrollers, and many microchip serial eeprom products. with microchips powerful mplab integrated development environmen t (ide) the pickit? 2 enables in-circuit debugging on most pic ? microcon- trollers. in-circuit-debugging runs, halts and single steps the program while the pic microcontroller is embedded in the applicatio n. when halted at a break- point, the file registers ca n be examined and modified. the pickit 2 debug express include the pickit 2, demo board and microcontroller, hookup cables and cdrom with users guide, lessons, tutorial, compiler and mplab ide software. 8.12 mplab pm3 device programmer the mplab pm3 device programmer is a universal, ce compliant device programmer with programmable voltage verification at v ddmin and v ddmax for maximum reliability. it features a large lcd display (128 x 64) for menus and error messages and a modu- lar, detachable socket asse mbly to support various package types. the icsp? ca ble assembly is included as a standard item. in stand-alone mode, the mplab pm3 device programmer can read, verify and program pic devices without a pc co nnection. it can also set code protection in this mode. the mplab pm3 connects to the host pc via an rs-232 or usb cable. the mplab pm3 has high-speed communications and optimized algorithms for quick programming of large memory devices and incorpor ates an mmc card for file storage and data applications. 8.13 demonstration/development boards, evaluation kits, and starter kits a wide variety of demonstr ation, development and evaluation boards for various pic mcus and dspic dscs allows quick application development on fully func- tional systems. most boards include prototyping areas for adding custom circuitry and provide application firmware and source code for examination and modification. the boards support a variety of features, including leds, temperature sensors, sw itches, speakers, rs-232 interfaces, lcd displays, potentiometers and additional eeprom memory. the demonstration and development boards can be used in teaching environments, for prototyping custom circuits and for learning about various microcontroller applications. in addition to the picdem? and dspicdem? demon- stration/development board series of circuits, microchip has a line of evaluation kits and demonstration software for analog filter design, k ee l oq ? security ics, can, irda ? , powersmart battery management, seeval ? evaluation system, sigma-delta adc, flow rate sensing, plus many more. also available are starter kits that contain everything needed to experience the specified device. this usually includes a single application and debug capability, all on one board. check the microchip web page (www.microchip.com) for the complete list of demonstration, development and evaluation kits. downloaded from: http:///
? 2011 microchip technology inc. ds40146f-page 25 hcs361 9.0 electrical characteristics table 9-1: absolute maximum ratings table 9-2: dc characteristics symbol item rating units v dd supply voltage -0.3 to 6.9 v v in input voltage -0.3 to v dd + 0.3 v v out output voltage -0.3 to v dd + 0.3 v i out max output current 25 ma t stg storage temperature -55 to +125 c (note) t lsol lead soldering temp 300 c (note) v esd esd rating 4000 v note: stresses above those listed under ?absolute maximum ratings? ma y cause permanen t damage to the device. commercial (c): tamb = 0 c to +70 c industrial (i): tamb = -40 c to +85 c 2.0v < v dd < 3.3 3.0 < v dd < 6.6 parameter sym. min typ 1 max min typ 1 max unit conditions operating current (avg) i cc 0.3 1.2 0.7 1.6 ma v dd = 3.3v v dd = 6.6v standby current i ccs 0.1 1.0 0.1 1.0 a auto-shutoff current 2,3 i ccs 40 75 160 350 a high level input voltage v ih 0.55v dd v dd +0.3 0.55v dd v dd +0.3 v low level input voltage v il -0.3 0.15v dd -0.3 0.15v dd v high level output voltage v oh 0.7v dd 0.7v dd vi oh = -1.0 ma, v dd = 2.0v i oh = -2.0 ma, v dd = 6.6v low level output voltage v ol 0.08v dd 0.08v dd vi ol = 1.0 ma, v dd = 2.0v i ol = 2.0 ma, v dd = 6.6v led sink current i led 0.15 1.0 4.0 0.15 1.0 4.0 ma v led 4 = 1.5v, v dd = 6.6v pull-down resistance; s0-s3 r s 0-3 40 60 80 40 60 80 k v dd = 4.0v pull-down resistance; pwm r pwm 80 120 160 80 120 160 k v dd = 4.0v note 1: typical values are at 25 c. 2: auto-shutoff current specification does not include the current thro ugh the input pull-down resistors. 3: auto-shutoff current is periodically sampled and not 100% tested 4: v led is the voltage between the v dd pin and the led pin. downloaded from: http:///
hcs361 ds40146f-page 26 ? 2011 microchip technology inc. figure 9-1: power-up and transmit timing table 9-3: power-up and transmit timing requirements v dd = +2.0 to 6.6v commercial (c): tamb = 0 c to +70 c industrial (i): tamb = -40 c to +85 c parameter symbol min max unit remarks time to second button press t bp 10 + code word time 26 + code word time ms (note 1) transmit delay from button detect t td 4.5 26 ms (note 2) debounce delay t db 41 3m s auto-shutoff time-out period t to 15 35 s (note 3) note 1: t bp is the time in which a second button can be presse d without completion of the first code word and the intention was to press the combination of buttons. 2: transmit delay maximum value if the previous transmission was successfully transmitted. 3: the auto-shutoff time-out period is not tested. button press sn detect t db output t td multiple code word transmission t to code word 1 code word 2 code word 3 code word n t bp code word 4 pwm input button downloaded from: http:///
? 2011 microchip technology inc. ds40146f-page 27 hcs361 figure 9-2: pwm format summary (mod = 0) figure 9-3: pwm preamble /header format (mod=0) figure 9-4: pwm data format (mod=0) t bp code word guard time duty cycle: 1/6-2/6 spm=1 spm=0 18xt e preamble 10xt e header encrypted portion fixed code portion t bp code word: 1 6 10 (txwak=1) t bp logic 0 logic 1 duty cycle: 1/3-2/3 (txwak=0) t bp =3 x t e logic 0 t bp logic 1 t e t e txwak=0 txwak=1 33% duty cycle 10xt e sync pulse spm = 0 spm = 1 10xt e header 28xt e preamble 10xt e sync pulse bit 0 bit 1 header bit 30 bit 31 bit 32 bit 33 bit 58 bit 59 fixed portion of transmission encrypted portion guard lsb lsb msb msb s3 s0 s1 s2 v low crc0 crc1 time serial number function code status bit 60 bit 61 bit 62 bit 63 bit 64 bit 65 crc bit 66 of transmission downloaded from: http:///
hcs361 ds40146f-page 28 ? 2011 microchip technology inc. figure 9-5: vpwm format summary (mod = 1) figure 9-6: vpwm wake-up format (mod=1) figure 9-7: vpwm preamble/header format (mod=1) figure 9-8: vpwm data word format (mod=1) wake-up (txwak=1) preamble sync encrypt fixed guard dead time 1st code word preamble sync encrypt 33% duty cycle wake-up sequence 250xt e t bp 1 84 dead time 258xt e code word guard time spm=1 spm=0 18xt e preamble 10xt e header encrypted portion fixed code portion t bp 1 6 10 10xt e sync pulse 10 0 1 01 2 3 101 1 28 29 30 31 10 0 1 32 33 34 35 10 0 1 56 57 58 59 10 0 1 60 61 62 63 10 64 65 1 66 encrypted data serial number function code v low crc note: the bit values are only shown as an example. bit t bp logic 0 logic 1 on transition low to high t bp logic 0 t bp logic 1 t e on transition high to low 2 x t e t e t bp t e downloaded from: http:///
? 2011 microchip technology inc. ds40146f-page 29 hcs361 figure 9-9: hcs361 norm alized te vs. temp 0.8 1.7 1.6 1.5 1.4 1.3 1.2 1.1 1.0 0.9 0.7 0.6 t e min. t e max. v dd legend = 2.0v = 3.0v = 6.0v ty p i c a l t e temperature c -50 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 downloaded from: http:///
hcs361 ds40146f-page 30 ? 2011 microchip technology inc. table 9-4: timing parameters: pwm mode (txwak=0) table 9-5: timing parameter s: pwm mode (txwak=1) v dd = +2.0 to 6.6v commercial (c):tamb = 0 c to +70 c industrial (i):tamb = -40 c to +85 c code words transmitted bsel = 0 bsel = 1 symbol characteristic min typ. max. min. typ. max. units t e basic pulse element 260 400 620 130 200 310 s t bp pwm bit pulse width 33 t e t p preamble duration 28 28 t e t s sync pulse duration 10 10 t e t h header duration 10 10 t e t hop hopping code duration 96 96 t e t fix fixed code duration 105 105 t e t g guard time 18 34 t e ? total transmit time 267 283 t e ? total transmit time 69.4 106.8 165.5 36.7 56.6 87.7 ms ? pwm data rate 1282 833 538 2564 1667 1075 bps note: the timing parameters are not tested but derived from the oscillator clock. v dd = +2.0 to 6.6v commercial (c):tamb = 0 c to +70 c industrial (i):tamb = -40 c to +85 c code words transmitted bsel = 0 bsel = 1 symbol characteristic min typ. max. min. typ. max. units t e basic pulse element 130 200 310 65 100 155 s t bp pwm bit pulse width 66 t e t p preamble duration 28 28 t e t s sync pulse duration 10 10 t e t h header duration 10 10 t e t hop hopping code duration 192 192 t e t fix fixed code duration 210 210 t e t g guard time 34 66 t e ? total transmit time 484 516 t e ? total transmit time 62.9 96.8 150.0 33.5 51.6 79.9 ms ? pwm data rate 1282 833 538 2564 1667 1075 bps note: the timing parameters are not tested but derived from the oscillator clock. downloaded from: http:///
? 2011 microchip technology inc. ds40146f-page 31 hcs361 table 9-6: timing parameters: vpwm mode (bsel=0) table 9-7: timing parameter s: vpwm mode (bsel=1) v dd = +2.0 to 6.6v commercial (c): tamb = 0 c to +70 c industrial (i): tamb = -40 c to +85 c code words transmitted shortest longest symbol characteristic min typ. max. min. typ. max. units t e basic pulse element 260 400 620 260 400 620 s t p preamble duration 28 28 t e t s sync pulse duration 10 10 t e t h header duration 10 10 t e t hop hopping code duration 32 64 t e t fix fixed code duration 35 70 t e t g guard time 114 114 t e ? total transmit time 229 296 t e ? total transmit time 59.5 91.6 141.9 76.9 118.4 183.5 ms ? vpwm data rate 3846 2500 1613 3846 2500 1613 bps note: the timing parameters are not tested but derived from the oscillator clock. v dd = +2.0 to 6.6v commercial (c): tamb = 0 c to +70 c industrial (i): tamb = -40 c to +85 c code words transmitted shortest longest symbol characteristic min typ. max. min. typ. max. units t e basic pulse element 130 200 310 130 200 310 s t p preamble duration 28 28 t e t s sync pulse duration 10 10 t e t h header duration 10 10 t e t hop hopping code duration 32 64 t e t fix fixed code duration 35 70 t e t g guard time 226 226 t e ? total transmit time 341 408 t e ? total transmit time 44.3 68.2 105.7 53.0 81.6 126.4 ms ? vpwm data rate 7692 5000 3226 7692 5000 3226 bps note: the timing parameters are not tested but derived from the oscillator clock. downloaded from: http:///
hcs361 ds40146f-page 32 ? 2011 microchip technology inc. 10.0 packaging information 10.1 package marking information 8-lead pdip example 8-lead soic example xxxxxxxx xxxxxnnn yyww hcs361 xxxxxnnn 0025 xxxxxxx xxxyyww nnn hcs361xxx0025 nnn legend: xx...x customer specific information* y year code (last digit of calendar year) yy year code (last 2 digits of calendar year) ww week code (week of january 1 is week 01) nnn alphanumeric traceability code note : in the event the full microchip part num ber cannot be marked on one line, it will be carried over to the next line thus limiting the number of available characters for customer specific information. * standard pic mcu device marking consists of micr ochip part number, year code, week code, and traceability code. for pic mcu device marking beyond this, certain price adders apply. please check with your microchip sales office. for qtp devices, any special marking adders are included in qtp price. downloaded from: http:///
? 2011 microchip technology inc. ds40146f-page 33 hcs361 10.2 package detail s n e1 note 1 d 12 3 a a1 a2 l b1 b e e eb c downloaded from: http:///
hcs361 ds40146f-page 34 ? 2011 microchip technology inc. note: for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging downloaded from: http:///
? 2011 microchip technology inc. ds40146f-page 35 hcs361 note: for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging downloaded from: http:///
hcs361 ds40146f-page 36 ? 2011 microchip technology inc. downloaded from: http:///
? 2011 microchip technology inc. ds40146f-page 37 hcs361 appendix a: additional information microchips secure data products are covered by some or all of the following: code hopping encoder patents issued in european countries and u.s.a. secure learning patents issued in european countries, u.s.a. and r.s.a. revision history revision f (june 2011) updated the following sections: development sup- port, the microchip web site, reader response and hcs361 product identification system added new section appendix a minor formatting and text changes were incorporated throughout the document downloaded from: http:///
hcs361 ds40146f-page 38 ? 2011 microchip technology inc. the microchip web site microchip provides online support via our www site at www.microchip.com. this web site is used as a means to make files and information easily available to customers. accessible by using your favorite internet browser, the web site contains the following information: product support C data sheets and errata, application notes and sample programs, design resources, users guides and hardware support documents, latest software releases and archived software general technical support C frequently asked questions (faq), technical support requests, online discussion groups, microchip consultant program member listing business of microchip C product selector and ordering guides, latest microchip press releases, listing of seminars and events, listings of microchip sales offices, distributors and factory representatives customer change notification service microchips customer notification service helps keep customers current on microchip products. subscribers will receive e-mail notification whenever there are changes, updates, revisions or errata related to a specified product family or development tool of interest. to register, access the microchip web site at www.microchip.com. under support, click on customer change notification and follow the registration instructions. customer support users of microchip products can receive assistance through several channels: distributor or representative local sales office field application engineer (fae) technical support development systems information line customers should contact their distributor, representative or field application engineer (fae) for support. local sales offices are also available to help customers. a listing of sa les offices and locations is included in the back of this document. technical support is available through the web site at: http://micro chip.com/support downloaded from: http:///
? 2011 microchip technology inc. ds40146f-page 39 hcs361 reader response it is our intention to provide you with the best documentation possible to ensure successful use of your microchip product. if you wish to provide your comments on organization, clarity, subject matter, and ways in which our documentation can better serve you, please fax your comments to the technical publications manager at (480) 792-4150. please list the following information, and use this outli ne to provide us with your comments about this document. to: technical publications manager re: reader response total pages sent ________ from: name company address city / state / zip / country telephone: (_______) _________ - _________ application (optional): would you like a reply? y n device: literature number: questions: fax: (______) _________ - _________ ds40146f hcs361 1. what are the best features of this document? 2. how does this document meet your hardware and software development needs? 3. do you find the organization of this document easy to follow? if not, why? 4. what additions to the document do you th ink would enhance the structure and subject? 5. what deletions from the document could be made without affecting the overall usefulness? 6. is there any incorrect or misl eading information (what and where)? 7. how would you improve this document? downloaded from: http:///
hcs361 ds40146f-page 40 ? 2011 microchip technology inc. hcs361 product iden tification system to order or obtain information, e.g., on pricing or deli very, refer to the factory or the listed sales office. package: p= plastic dip (300 mil body), 8-lead sn = plastic soic (150 mil body), 8-lead temperature blank = 0c to +70c range: i = C40c to +85c device: hcs361 code hopping encoder hcs361t code hopping encoder (tape and reel) hcs361 /p downloaded from: http:///
? 2011 microchip technology inc. ds40146f-page 41 information contained in this publication regarding device applications and the like is prov ided only for your convenience and may be superseded by updates. it is your responsibility to ensure that your application me ets with your specifications. microchip makes no representations or warranties of any kind whether express or implied, written or oral, statutory or otherwise, related to the information, including but not limited to its condition, quality, performance, merchantability or fitness for purpose . microchip disclaims all liability arising from this information and its use. use of microchip devices in life support and/or safe ty applications is entirely at the buyers risk, and the buyer agrees to defend, indemnify and hold harmless microchip from any and all damages, claims, suits, or expenses resulting fr om such use. no licenses are conveyed, implicitly or ot herwise, under any microchip intellectual property rights. trademarks the microchip name and logo, th e microchip logo, dspic, k ee l oq , k ee l oq logo, mplab, pic, picmicro, picstart, pic 32 logo, rfpic and uni/o are registered trademarks of microchip technology incorporated in the u.s.a. and other countries. filterlab, hampshire, hi-tech c, linear active thermistor, mxdev, mxlab, seeval and the embedded control solutions company are register ed trademarks of microchip technology incorporated in the u.s.a. analog-for-the-digital age, application maestro, codeguard, dspicdem, dspicdem.net, dspicworks, dsspeak, ecan, economonitor, fansense, hi-tide, in-circuit serial programming, icsp, mindi, miwi, mpasm, mplab certified logo, mplib, mplink, mtouch, omniscient code generation, picc, picc-18, picdem, picdem.net, pickit, pictail, real ice, rflab, select mode, total endurance, tsharc, uniwindriver, wiperlock and zena are trademarks of microchip te chnology incorporated in the u.s.a. and other countries. sqtp is a service mark of mi crochip technology incorporated in the u.s.a. all other trademarks mentioned herein are property of their respective companies. ? 2011, microchip technology incorporated, printed in the u.s.a., all rights reserved. printed on recycled paper. isbn: 978-1-61341-222-0 note the following details of the code protection feature on microchip devices: microchip products meet the specification cont ained in their particular microchip data sheet. microchip believes that its family of products is one of the mo st secure families of its kind on the market today, when used i n the intended manner and under normal conditions. there are dishonest and possibly illegal meth ods used to breach the code protection fe ature. all of these methods, to our knowledge, require using the microchip products in a manner outside the operating specif ications contained in microchips data sheets. most likely, the person doing so is engaged in theft of intellectual property. microchip is willing to work with the customer who is concerned about the integrity of their code. neither microchip nor any other semiconduc tor manufacturer can guarantee the security of their code. code protection does not mean that we are guaranteeing the product as unbreakable. code protection is constantly evolving. we at microchip are committed to continuously improving the code protection features of our products. attempts to break microchips c ode protection feature may be a violation of the digital millennium copyright act. if such acts allow unauthorized access to your softwa re or other copyrighted work, you may have a right to sue for relief under that act. microchip received iso/ts-16949:2002 certification for its worldwide headquarters, design and wafer fabrication facilities in chandler and tempe, arizona; gresham, oregon and design centers in california and india. the companys quality system processes and procedures are for its pic ? mcus and dspic ? dscs, k ee l oq ? code hopping devices, serial eeproms, microperi pherals, nonvolatile memory and analog products. in addition, microchips quality system for the design and manufacture of development systems is iso 9001:2000 certified. downloaded from: http:///
ds40146f-page 42 ? 2011 microchip technology inc. americas corporate office 2355 west chandler blvd. chandler, az 85224-6199 tel: 480-792-7200 fax: 480-792-7277 technical support: http://www.microchip.com/ support web address: www.microchip.com atlanta duluth, ga tel: 678-957-9614 fax: 678-957-1455 boston westborough, ma tel: 774-760-0087 fax: 774-760-0088 chicago itasca, il tel: 630-285-0071 fax: 630-285-0075 cleveland independence, oh tel: 216-447-0464 fax: 216-447-0643 dallas addison, tx tel: 972-818-7423 fax: 972-818-2924 detroit farmington hills, mi tel: 248-538-2250 fax: 248-538-2260 indianapolis noblesville, in tel: 317-773-8323 fax: 317-773-5453 los angeles mission viejo, ca tel: 949-462-9523 fax: 949-462-9608 santa clara santa clara, ca tel: 408-961-6444 fax: 408-961-6445 toronto mississauga, ontario, canada tel: 905-673-0699 fax: 905-673-6509 asia/pacific asia pacific office suites 3707-14, 37th floor tower 6, the gateway harbour city, kowloon hong kong tel: 852-2401-1200 fax: 852-2401-3431 australia - sydney tel: 61-2-9868-6733 fax: 61-2-9868-6755 china - beijing tel: 86-10-8569-7000 fax: 86-10-8528-2104 china - chengdu tel: 86-28-8665-5511 fax: 86-28-8665-7889 china - chongqing tel: 86-23-8980-9588 fax: 86-23-8980-9500 china - hangzhou tel: 86-571-2819-3180 fax: 86-571-2819-3189 china - hong kong sar tel: 852-2401-1200 fax: 852-2401-3431 china - nanjing tel: 86-25-8473-2460 fax: 86-25-8473-2470 china - qingdao tel: 86-532-8502-7355 fax: 86-532-8502-7205 china - shanghai tel: 86-21-5407-5533 fax: 86-21-5407-5066 china - shenyang tel: 86-24-2334-2829 fax: 86-24-2334-2393 china - shenzhen tel: 86-755-8203-2660 fax: 86-755-8203-1760 china - wuhan tel: 86-27-5980-5300 fax: 86-27-5980-5118 china - xian tel: 86-29-8833-7252 fax: 86-29-8833-7256 china - xiamen tel: 86-592-2388138 fax: 86-592-2388130 china - zhuhai tel: 86-756-3210040 fax: 86-756-3210049 asia/pacific india - bangalore tel: 91-80-3090-4444 fax: 91-80-3090-4123 india - new delhi tel: 91-11-4160-8631 fax: 91-11-4160-8632 india - pune tel: 91-20-2566-1512 fax: 91-20-2566-1513 japan - yokohama tel: 81-45-471- 6166 fax: 81-45-471-6122 korea - daegu tel: 82-53-744-4301 fax: 82-53-744-4302 korea - seoul tel: 82-2-554-7200 fax: 82-2-558-5932 or 82-2-558-5934 malaysia - kuala lumpur tel: 60-3-6201-9857 fax: 60-3-6201-9859 malaysia - penang tel: 60-4-227-8870 fax: 60-4-227-4068 philippines - manila tel: 63-2-634-9065 fax: 63-2-634-9069 singapore tel: 65-6334-8870 fax: 65-6334-8850 taiwan - hsin chu tel: 886-3-6578-300 fax: 886-3-6578-370 taiwan - kaohsiung tel: 886-7-213-7830 fax: 886-7-330-9305 taiwan - taipei tel: 886-2-2500-6610 fax: 886-2-2508-0102 thailand - bangkok tel: 66-2-694-1351 fax: 66-2-694-1350 europe austria - wels tel: 43-7242-2244-39 fax: 43-7242-2244-393 denmark - copenhagen tel: 45-4450-2828 fax: 45-4485-2829 france - paris tel: 33-1-69-53-63-20 fax: 33-1-69-30-90-79 germany - munich tel: 49-89-627-144-0 fax: 49-89-627-144-44 italy - milan tel: 39-0331-742611 fax: 39-0331-466781 netherlands - drunen tel: 31-416-690399 fax: 31-416-690340 spain - madrid tel: 34-91-708-08-90 fax: 34-91-708-08-91 uk - wokingham tel: 44-118-921-5869 fax: 44-118-921-5820 worldwide sales and service 05/02/11 downloaded from: http:///

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